US nominates next-generation killer application 3D chip as the biggest technical challenge

The 3D Enablement Center (3DEC), which is owned by Sematech, a US semiconductor technology research and development alliance, and the Semiconductor Industry Association (SIA) and Semiconductor Research Corp. (SRC) has recently defined the future 3D chip (3DIC) technology killer applications after wide I/ODRAM and the challenges it will face.

Sematech stated that experts in the above-mentioned units have discussed heterogeneous computing, memory, imaging, smart sensor systems, communication switches, and power delivery/reconciliation. /conditioning) and other promising future killer application technologies. The technical challenges related to these applications include: reducing the cost of 3D chip architecture, system/architecture addressing (pathfinding), common heterogeneous multi-die stack testing problems, and thermal management.

"Overcoming common technological challenges of next-generation applications is the key to accelerating the promotion of 3D chip technology." Dan Embrust, President and Chief Executive Officer of Sematech, said: "The next phase of Sematech's 3DEC's related collaborative R&D program aims at these common goals. Technical challenges to provide a usable infrastructure."

Sematech pointed out that after the advent of wide I/ODRAM, the high market demand and a large number of applications confirming the advantages of 3D integration will drive the further development of 3D chip technology in the industry; those advantages include lower power consumption and more High performance, increased functionality, and lower costs.

Since January 2011, Sematech's 3DEC has taken the lead in the development of 3D chip standards and specifications; in order to welcome the era of future 3D integrated chips and systems, 3DEC defines the relevant killer applications and common technical challenges that can be seen within 3 to 5 years. Pave the way for 3D chip technology behind wide I/ODRAM.

"The development of 3D chip technology has come to a turning point;" SIA chairman Brian Toohey said that the industry has realized the benefits of cooperation through many jobs. This developing partnership will push 3D chip integration technology to the next level. In this phase, the industry fully understands the potential of related technologies for semiconductor manufacturing and design. Sematech's 3DEC has been established since December 2010 and has focused on developing cost-effective TSV process 3D chip solutions to promote the establishment of a support ecosystem across the industry.