The equivalent circuit diagram of the CA555 time base circuit can be seen that VTl-VT4, VT5, VT7 constitute the comparator Al, the base potential of VT7 is connected to the upper end of the voltage divider composed of three 5kΩ resistors, the voltage is VDD; VT9-VT13 is composed of comparator A2, the base of VTl3 is connected to the lower end of the voltage divider, and the reference potential is VDD. In circuit design, the three 5kΩ resistors that make up the voltage divider are required to have exactly the same resistance to give two more accurate reference potentials, VDD and VDD. VTl4-VTl7 is combined with a 4.7kΩ positive feedback resistor to form a bistable trigger circuit. The VTl8-VT21 forms a push-pull power output stage that can output approximately 200mA. VT8 is a reset amplifier stage, and VT6 is a discharge transistor that can withstand currents above 50mA. The operating state of the bistable trigger circuit is determined by the outputs of comparators A1, A2.
HDMI, known as High Definition Multimedia Interface, is mainly used for transmitting HD audio and video signals.
There are three types of data transmitted by HDMI TMDS (plus Hsync and Vsync count as four) :
1.Preamble (control information) is mainly used to control the Data to be transmitted next, namely Data Island or Video Data
2.Data Island, all kinds of packet information, including audio packet, image packet, etc
3.Video Data, Video pixel Data. HDMI can transmit pixel Data in RGB and YUV formats
4. And Hsync and Vsync
HDMI Source device (HDMI HPD) will monitor the Hotplug port of the sink device. If the Hotplug is High, it will prove that the device can work, and then read DCC; if it is low, it will prove that the device is disconnected.
The HDMI Sink device should notify the source device that EDID has been changed by pulling the Hotplug down, and the source device will read the new EDID again after the Hotplug is pulled up, which should be more than 100ms.
HDMI provides that the EDID can be read by DCC when the 5V pin of HDMI is powered on, that is, the Hotplug needs to be high, and some Hotplug is directly connected to the 5V
TMDS Clock is the Pixel Clock, the Clock frequency used for a Pixel point. Through TMDS Clock CLK pins transmitted to the receiver, but the receiver is not clear for what TMDS Clock frequency of the sender sent, so you need to through the Phy (Phy is analog to digital conversion section, is different from the ADC, Phy is don't know the sampling frequency, the need to lock frequency and phase lock, detect the exact input frequency) to lock.
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